(1) Field of the Invention
The present invention relates to the fabrication of high-resistance polysilicon resistors for integrated circuits on semiconductor substrates, and more particularly relates to a two-layer polysilicon resistor structure that can have any desirable sheet resistance and have more reliable contacts than conventional polysilicon resistors.
(2) Description of the Prior Art
Many integrated circuits utilize both analog and digital circuits on the same chip, commonly referred to as mixed-mode circuits. Besides analog-to-digital converters (ADC) and digital-to-analog converters (DAC), some special applications circuits include audio Digital-Sign-Processing (DSP) circuits, battery chargers and the like. These mixed-mode circuits require capacitors and resistors having high resistance. These high value resistors are fabricated by patterning a doped polysilicon layer having high sheet resistivity R.sub.S that is expressed by the equation EQU R.sub.S =rho/T
where rho is the resistivity expressed in units of ohm-cm, and T is the thickness of the doped polysilicon expressed in cm. To achieve a high R.sub.S, it is therefore necessary to either increase the resistivity, rho, or to decrease the thickness, T. One method of doping the polysilicon layer is by POCl.sub.3 doping, but the high resistivity values are difficult to control. Another method of achieving high sheet resistance R.sub.S is to use ion implantation, which more accurately controls the dopant level in the polysilicon layer. However, implanted resistors generally have greater variations in resistance as a function of temperature and voltage, typically expressed by the temperature coefficient of resistivity (TCR), and by the voltage coefficient of resistivity (VCR), respectively. Another method of increasing the resistance R.sub.S is to reduce the thickness T of the doped polysilicon layer. However, when the thickness of the polysilicon layer is reduced to less than 1000 Angstroms to increase the resistivity, contacts etched in an insulating layer over and to this thin polysilicon layer can result in overetching. Overetching of this thin polysilicon layer can damage the thin underlying interpolysilicon oxide (IPO) layer when the resistors are formed over the IPO layer, which also serves as the interelectrode dielectric for capacitors.
Several methods for making polysilicon resistors which are stable from hydrogen intrusion have been reported. For example, Hsu et al., U.S. Pat. No. 5,530,418, teach a method of forming a metal shield around a polysilicon resistor to prevent hydrogen intrusion. Another method for stabilizing polysilicon resistors from hydrogen intrusion is described by Chang et al. in U.S. Pat. No. 5,837,592, in which the polysilicon resistors are treated in a nitrogen plasma, which minimizes variations of the resistance due to hydrogen intrusion. Also, a method for making Static Random Access Memory (SRAM) with low stand-by currents is described by Wu et al., U.S. Pat. No. 5,728,598, in which the voltage on one polysilicon layer induces a depletion region in a second polysilicon layer that results in a higher sheet resistance.
However, there is still a need in the semi-conductor industry to provide polysilicon resistors having repeatable high resistance for mixed-mode circuit applications.